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DSP Reverse

Notable Brands of DSP

  Time:2012-05-07 15:46

Taxes Instrument DSP :TI produces the C6000 series DSPs, whose clock speeds of 1.2 GHz and implement separate instruction and data caches.They also have 8 MiB 2nd level cache and 64 EDMA channels. The top models are capable of as many as 8000 MIPS(instruction per second), use VLIW (Very Long Instruction Word), perform eight operations per clock-cycle and are compatible with a broad range of external peripherals and various buses(PCI/serial/etc). TMS320C6474 chips each have three such DSP's.,and the newest generation C6000 chips support floating point as well as fixed point processing.

Freescale produces a multi-core DSP family, the MSC81xx is based on StarCore Architecture processors and the latest MSC8144 DSP combines four programmable SC3400 StarCore DSP cores. Each SC3400 StarCore DSP core has a clock speed of 1GHz.

XMOS produces a multi-core multi-threaded line of processor well suited to DSP operations, they come in various speed ranging from 400 to 1600 MIPS. The processors have a multi-threaded architecture that allows up to 8 real-time threads per core, meaning that a 4 core device would support up to 32 real time threads. Threads communicate between each other with buffered channels that are capable of up to 80 Mbit/s. The devices are easily programmable in C and aim at bridging the gap between conventional micro-controllers and FPGA'S.

CEVA.Inc. produces and licenses three distinct families of DSPs. Perhaps the best known and most widely deployed is the CEVA-TeakLite DSP family, a classic memory-based architecture, with 16-bit or 32-bit word-widths and single or dual MACs. The CEVA-X DSP family offers a combination of VLIW and SIMD architectures, with different members of the family offering dual or quad 16-bit MACs. The CEVA-XC DSP family targets Software-defined Radio(SDR) modem designs and leverages a unique combination of VLIW and Vector architectures with 32 1-bit MACs.

Analog Devices produce the SHARC-based DSP and range in performance from 66 MHz/198 MFLOPS(million floating-point operations per second) to 400 MHz/2400 MFLOPS. Some models support multiple multipliers and ALUs, SIMD instruction and audio processing -specific components and peripherals. The Blackfin family of embedded digital signal processors combine the features of a DSP with those of a general use processor . As a result, these processors can run simple operating systems like μCLinux, velOSity and Nucleus RTOS while operating on real-time data.

NXP Semiconductors produce DSP's based on TriMedia VLIW technology, optimized for audio and video processing. In some products the DSP core is hidden as a fixed-function block into a SoC, but NXP also provides a range of flexible single core media processors. The TriMedia media processors support both fixed-point arithmetic as well as floating-point arithmetic, and have specific instructions to deal with complex filters and entropy coding.